Skip to main content
Communication and Computing Systems Lab
CCSL
Communication and Computing Systems Lab
Home
People
All Profiles
Principal Investigator
Postdoctoral Fellows
Research Scientists
Research Staff
Students
Alumni
Former Members
Research
Wireless Communication
Body Area Network
AI Accelerator
All Projects
Publications
Publications
Google Scholar
DBLP
IEEE Xplore
KAUST Repository
ORCID
Events
Media Gallery
Contacts
Join us
smo
Low-Power Hardware Implementation of a Support Vector Machine Training and Classification for Neural Seizure Detection
1 min read ·
Thu, Apr 25 2019
News
Circuits
FPGA
smo
Heba Elhosary, et al., "Low-Power Hardware Implementation of a Support Vector Machine Training and Classification for Neural Seizure Detection." IEEE Transactions on Biomedical Circuits and Systems 13 (6), 2019, 1324. In this paper, a low power support vector machine (SVM) training, feature extraction, and classification algorithm are hardware implemented in a neural seizure detection application. The training algorithm used is the sequential minimal optimization (SMO) algorithm. The system is implemented on different platforms: such as field programmable gate array (FPGA), Xilinx Virtex-7 and